Samsung Austin Semiconductor

Dr. Altun is the co-founder and CEO of UNISERS AG, an ETH Zurich spinoff from Switzerland. UNISERS has been developing a wafer defect inspection and review tool with a sub-10nm detection limit. Dr. Altun has 15-year experience in nanotechnology and optical sensing. Prior to his position at UNISERS AG, he did a Ph.D. at ETH Zurich. He worked at Lawrence Livermore National Laboratories (2011-2014) and Korean Institute of Machinery and Materials (2005-2010). He had his B.Sc. degree from METU (Middle East Tech. Univ.), Turkey and M.Sc. degree at KAIST (Korea Advanced Institute of Science and Technology).

UNISERS

Hideaki IINO is a Chief Researcher at KURITA WATER INDUSTRIES LTD, where he currently manages JDP activities with Interuniversity of MicroElectronics Centre (IMEC) in Belgium. I have been more than 10 years in the semiconductor industry on both the UPW technology and wet process business. I began my semiconductor career from developing particle reduction in UPW with a major component supplier, then subsequently learned the water purification and wet clean processes with IMEC. I have a lot of patents and conference presentations. I am a member of the IRDS UPW group.

Kurita Water Industries

I am a professional chemical engineer located in Kansas City. I focused on water and wastewater treatment design for the first 15 years of my career before transitioning into engineering and project management where I have mainly managed large water and wastewater projects for 10 years.

Kiewit

Tina is a civil engineer working for Kokosing, a self-performing heavy industrial contractor in the Midwest and Mid-Atlantic. She holds a BS in CE from Case Western Reserve University and a MS in CE from Cleveland State University. Tina is a licensed PE in IL, IN, MI, PA, OH.

Kokosing Industrial

Kevin Wolfe is an environmental engineer working within the Global Environmental department at Intel Corporation. He has been working at Intel for 21 years in many environmental health and safety capacities, and currently leads the PFAS working group internal to Intel, and helps to project manage the SIA Semiconductor PFAS Consortium that intends to work towards developing the technical information that will be required to effectively engage with PFAS regulatory restriction efforts.

Intel

Dan’s almost three decades of experience as a facilities engineering manager, process engineer, design engineer, construction project manager and tool hookup design in the advanced technologies and semiconductor manufacturing industry has led to innovative solutions in his work. His innovations have resulted in industry-changing quality and cost savings breakthroughs, including defect reduction and innovative water reclaim and re-use systems. Dan is well established in the semiconductor industry as an Ultra-pure Water, UHP Chemical and Wastewater expert as shown in his leadership of industry roadmap and collaboration teams. He is certified by ASQ as a six sigma black belt. His roles include Co-Chair of International Roadmap for Device and Systems (IRDS) Yield Enhancement (YE) team, Co-Chair UPW SEMI Standards team, and UP Micro Conference Strategy Team. In addition to many industry publications, Dan also holds a patent for Reduction of Charging Induced Damage in Photolithography Wet Process.

Latif joined Intel in 2005 as Microcontamination Engineer for the startup of 45nm process at Fab-32 in Arizona. He has been involved in four more process transfers to Arizona, including the latest 10nm startup. He is technical expert in Microcontamination, including AMC’s, with over 25 years of experience in environmental, semiconductor testing, AMC’s and other Microcontamination problem solving. Prior to joining Intel, Latif worked as a Research Scientist at Balazs Analytical and as a Technical Support Manager at ChemTrace. Latif has participated in collaborative efforts with many chemical and equipment manufacturing companies and organizations including, Sematech, Factory Mutual Research Corporation, in development of criteria for approval of materials suitable for use in semiconductor fabs.

Brad Herbert is a Sr. Process Engineer with Jacobs. Brad’s areas of focus include water management, water reclaim, ultrapure water, wastewater, chemicals, mentoring, and staff development. Over the past 30 years, Brad has worked as a global facilities engineer, site facilities engineer, facilities manager, design consultant, project manager, and product engineer in the semiconductor and water treatment industries. He has led engineering efforts, managed projects, and supported operations throughout The Americas, Europe, and Asia. His work history includes onsemi, LSI Logic, AMD, IDC (CH2M), DeNora Water Technologies, Monsanto, and Sigma-Aldrich. Brad is a licensed Professional Engineer and has a B.S. Degree in Chemical Engineering from the University of Missouri.

Jacobs Engineering Solutions

Gary Van Schooneveld is President of CT Associates, Inc. Gary has over 30 years of experience with high-purity fluid systems including chemical delivery and ultrapure water and the development and testing of their associated materials and components. He is the author or co-author of more than 45 technical papers and presentations. Gary is co-chair of the SEMI UPW Task Force and an active member of the IRDS UPW and IRDS Critical Components Task Forces. Gary as been a key contributor in the development and validation of SEMI specification for measuring filter retention below 15 nm (SEMI C79), particle shedding from critical components (SEMI F104) and extractables ion exchange resin rinse performance (SEMI C93). Gary has BS and MS degrees in Materials Engineering from Rensselaer Polytechnic Institute (Troy, NY) and an MBA from the University of Texas (Arlington, TX).

CT Associates

John Tracy is VP of Sales and Business Development at Gradiant Corporation. He has a combined 20 years of experience in the water industry, leading sales and marketing with Fluid Technology Solutions and Oasys Water, and in engineering and sales with Osmonics, Betz Labs, and ABB. John also has 15 years of experience in the semiconductor industry, in product management, with Axcelis Technologies and Akrion. He has a Chemical Engineering BS degree from Clarkson University and an MBA degree from Northeastern University.

Gradiant

Dave Buesser is the COO of FTD Solutions. He is a mechanical engineer from the University of Arizona, and he has spent his entire 27-year career driving advanced technology facilities forward. He began with a focus on semiconductor process piping design and proceeded to build likely the deepest experience in the industry on UPW distribution systems. He has led the design efforts for several UPW plants for greenfield semiconductor facilities and has also led many multi-discipline design teams on microelectronics facilities. Today, his focus is to bring world-class expertise coupled with unique tools to help solve the most pressing UPW and facilities challenges facing advanced industries.

FTD Solutions

Dominic is the Intel Director of Construction responsible for managing Intel’s latest leading edge Wafer FAB construction Program at Intel’s Ocotillo Campus Phoenix AZ. This program is part of Intel’s $20b investment on the campus.


Dominic has 35 years’ experience in EPCC project delivery. 16 years working with EPCC firms Costain, Jacobs, Fluor, DPS and 20 years within Intel.


Dominic holds a BSc in Construction Technology and an MSc in Project management.




Luke Wilson

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